1. Field of the Invention
The present invention relates in general to a method of forming a multilayer interconnection structure, and more particularly to a method of filling a through-hole with a metal by a chemical vapor deposition (CVD) method so as to obtain a multilayer interconnection.
2. Description of the Prior Art
A multilayer or three dimensional interconnection structure of a semiconductor device has been recently proposed to minimize the interconnection resistance and to save valuable chip area.
Referring to FIG. 7, a conventional method of forming a multilayer interconnection structure 10 will be described. This method comprises the following steps in the sequence.
First, a first insulating layer 12 is deposited on a first conductive layer 14, followed by the deposition of a second conductive layer 16 on the first insulating layer 12. Then, a second insulating layer 18 is deposited on the second conductive layer 16, so as to form a multilayer structure. Then, a through-hole 20 is formed on the multilayer structure so as to expose an upper surface 14a of the first conductive layer 14. The first and second conductive layers 14 and 16 are made of polysilicon, and the first and second insulating layers 12 and 18 are made of SiO.sub.2. Then, a metal such as tungsten is deposited in the through-hole 20 using a CVD method. It is noted that tungsten is selectively deposited on polysilicon surface by the CVD method, and not on SiO.sub.2 surface. Due to this characteristic of tungsten, it can be selectively deposited on the exposed upper surface 14a of the first conductive layer 14 and on two exposed side surfaces 16a of the second conductive layer 16. If a through-hole has a relatively low aspect ratio, the through-hole is filled with tungsten by growing tungsten deposition. However, due to a recent demand for high integration of semiconductor devices, the through-hole 20 has a relatively high aspect ratio. Due to this, as is seen from FIG. 7, the through-hole 20 tends to be blocked up by the growth of tungsten deposition 22 on the side surfaces 16a of the second conductive layer 16. With this, an undesirable void space 24 is left in the through-hole 20. This space 24 makes the first and second conductive layers 14 and 16 unconnected with each other.
To prevent the formation of the space 24, there is another conventional method of forming a multilayer interconnection structure. This method comprises the following steps in the sequence.
First, a first insulating layer is deposited on a first conductive layer. Then, a through-hole is formed through the first insulating layer so as to expose a portion of an upper surface of the first conductive layer. Then, tungsten is selectively deposited on the portion of the upper surface of the first conductive layer by a CVD method so as to fill the through-hole with tungsten. Then, a second conductive layer is deposited on the first insulating layer so as to interconnect the first and second conductive layers together through the deposited tungsten.
However, the above method is not applicable, for example, to a so-called SOI (Silicon-On-Insulator) multilayer integrated device which requires to deposit the second conductive layer on the first insulating layer before forming the through-hole.